SEALSQ Corp
A NASDAQ-listed semiconductor firm building post-quantum cryptographic chips, TPMs, and provisioning services for IoT, automotive, and robotics.
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SEALSQ (NASDAQ: LAES), spun off from WISeKey in 2022, designs post-quantum semiconductors that bake NIST-standardized lattice- and hash-based algorithms directly into silicon. Its QS7001 microcontroller and QVault TPM are aimed at device makers who need hardware roots of trust that will still be secure once quantum computers can break RSA and ECC, and the company pairs the chips with PKI and provisioning services so customers can personalize and manage keys at scale.
The company’s hardware has completed Common Criteria lab evaluation, with the report now headed to France’s ANSSI for EAL5+ certification, and it has announced a planned post-quantum chip personalization center in India with Kaynes Semicon. It is also running early proof-of-concept work applying its chips to robotics security. First meaningful product revenue is still projected for the second half of 2026, so most of the company’s quantum-security narrative remains forward-looking.
What differentiates SEALSQ from software-only PQC vendors is that it operates at the silicon layer, competing with the likes of Infineon and STMicroelectronics for embedded security sockets rather than with enterprise crypto-management software. That gives it a genuine hardware moat, but also means its commercial proof points lag its press cadence — a CISO evaluating SEALSQ today is largely betting on a 2026-2027 delivery timeline rather than buying a proven, shipping control.
Innovation Matrix Assessment
Moving from lab evaluation to a planned India personalization center and new robotics proof-of-concept inside roughly a year, though most milestones remain pre-revenue.
Gives device makers a hardware root of trust that is PQC-ready out of the box, reducing the crypto-agility burden on embedded engineering teams.
Publicly traded with a real India manufacturing partnership, but the company itself says first product revenue isn't expected until late 2026 — adoption is still largely ahead of it.
Embedding PQC at the chip level is a meaningful shift from software retrofits, but it sits within a broader industry-wide move to quantum-safe hardware rather than redefining the category alone.
Common Criteria evaluation is complete but not yet certified by ANSSI, and no independent, real-world deployment results were found.
Hardware-embedded PQC will matter more every year as NIST migration deadlines approach and long-lived embedded devices need crypto-agility baked in now.
Why CISOs Should Care
Device and IoT security teams need a quantum-safe hardware root of trust that doesn't require a full silicon redesign cycle later.
What Makes It Different
Competes at the semiconductor layer rather than as a software crypto-management overlay, giving PQC support that travels with the chip itself.
The Matrix Verdict
57/100 — INCREMENTAL INNOVATOR
An Incremental Innovator: a credible, publicly traded hardware play on post-quantum migration with real certification progress, but one whose commercial proof points are still mostly ahead of it rather than behind it.
Editorial Note: Claims vs. Verified Findings
SEALSQ's own press releases are the primary source for timelines like 2026 revenue and 'world-first' framing; the Common Criteria lab result is real but certification by ANSSI is still pending.
Sources
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